1. Field of the Invention
The present invention relates to a digital demultiplexer, a digital multiplexer, and a digital modem used in radio communication and the like, and relates in particular to a digital modem whose transmission speed can be varied readily.
This application is based on patent applications Nos. Hei 11-056772 and Hei 11-222053 filed in Japan, the contents of which are incorporated herein by reference.
2. Description of the Related Art
First, conventional digital multiplexer and demultiplexer will be explained.
When a device for multiplexing or demultiplexing a number of frequency-multiplexed channels is made using analogue circuits, it is necessary to employ as many local oscillators and band-stop filters as there are channels such that the scale of the device and power consumption are inevitably increased. In the meanwhile, with the widespread use of digital signal processing technologies, digital multi/demultiplexers have been made possible, resulting in miniaturization and low power consumption of such devices.
In particular, digital multi/demultiplexers based on multi-rate signal processing theory is an effective construction method for such devices because of the high degree of freedom in providing channel separation and selecting bandwidths.
FIG. 20 shows an example of the structure of a 4-digital signal demultiplexer for demultiplexing frequency-multiplexed signals, such as those shown in FIG. 22. This structure is the same as one reported in a reference, K. Yamano, xe2x80x9cFast Frequency Search and Demodulation with Complex Multi-Rate Filter Banksxe2x80x9d, ITE Technical Report, ROFT96-46.
The device shown in FIG. 20 is comprised by: an orthogonal detector 201; A/D converters 202, 203; 2-demultiplexing filter banks 204, 205, 206; high pass filters 2041, 2051, 2061; low pass filters 2042, 2052, 2062; down-samplers 2043, 2044, 2053, 2054, 2063, 2064; and wave shaping filters 2072, 2073, 2074.
The properties of each high pass filter 2041, 2051, 2061 are the same when standardized by the sampling frequency, and can be expressed as in the part (a) in FIG. 30. In this graph, fs relates to a sampling speed at the input of split filters. Similarly, the properties of low pass filters 2042, 2052, 2062 can be shown by the part (b) in FIG. 30.
Received signals are input in the orthogonal detector 201, and are converted to in-phase components and orthogonal components. Analogue signals of in-phase and orthogonal components output from the orthogonal detector 201 are respectively converted to digital signals in the A/D converters 202, 203, and are input in the split filter bank 204. The signals are separated into two groups in the split filter bank 204, and are respectively input in the high pass bank 2041 and the low pass filter 2042 for limiting the bandwidths.
Bandwidth-limited signals are input into respective down-samplers 2043, 2044 and are culled to 1/2 by down-sampling. Signals output from the down-sampler are input in the serially-connected split filter banks 205, 206. Signals are split into two groups in the split filter banks 205, 206 are input into high pass filters 2051, 2061 and low pass filters 2052, 2062, respectively.
Bandwidth-limited signals are respectively input in the down-samplers 2053, 2054, 2063, 2064, and are down-sampled to 1/2 at the timing shown in FIG. 6, and are wave shaped in 2071, 2072, 2073, 2074, and are output as four independent signal groups shown in FIG. 22.
Signal spectra at the points A, B, C, D of the signal processed through the components 2041, 2043, 2051, 2053 indicated in FIG. 20 are shown, respectively, in the parts (a)xcx9c(e) in FIGS. 23xcx9c24. Circled numbers refer to separate source signals and are used throughout in the same manner in the following presentation.
Next, an example of the structure of 4-wave digital multiplexer with input of four separate signal groups is shown in FIG. 21. The vectors for each signal are shown in FIG. 25. The device is comprised by: 2-multiplexing filter banks 212, 213; up-samplers 2111, 2112, 2121, 2122, 2131, 2132; high pass filters 2113, 2123, 2133; low pass filters 2114, 2124, 2134; low pass filters 2114, 2124, 2134; adders 2115,2125, 2135; A/D converters 214, 215; orthogonal modulator 216; and wave shaping filters 2171, 2172, 2173, 2174.
Four groups of different baseband signals are input in filters 2171, 2172, 2173, 2174 in two separate groups. The output from the wave shaping filters are input in the 2-multiplexing filter banks 211, 212, and are up-sampled in the up-samplers 2111, 2112, 2121, 2122 to double the sampling speed at the timing shown in FIG. 12.
Signals output from the up-samplers 2111, 2112 are input in the high pass filter 2113 and the low pass filter 2114, respectively, and are added in the adder 2115. Similarly, signals output from the up-samplers 2121, 2122 are input in the high pass filter 2123 and the low pass filter 2124, respectively, and are added in the adder 2125. Signals output from the 2-multiplexing filter banks 211, 212 are input in the 2-multiplexing filter bank 213.
Input signals are input in the up-sampler 2131, 2132 that interpolates to twice the size at the timing shown in FIG. 12. Signals output from the up-samplers 2131, 2132 are input in the highpass filter 2133 and the low pass filter 2134, respectively, and are added in the adder 2135. Signals output from the 2-multiplexing filter bank 213 is input in the D/A converters 214, 215 and are then converted to desired radio frequencies in the orthogonal converter 216.
Signal spectra at the points A, B, C, D, E, F, G of the signals processed through the components 2111, 2113, 2115, 2131, 2133, 2135 indicated in FIG. 21 are shown, respectively, in the parts (a)xcx9c(g) in FIGS. 26xcx9c28.
Next, conventional digital modem and its operation will be explained.
FIG. 40 shows a construction of a conventional digital modem, and shows the transmitter side of the device for providing different transmission speeds based on a frequency division multiple access (FDMA) system.
The device is comprised by: serial-parallel conversion circuit 7001; modulation circuits 7002xcx9c7009; low pass filters 7010xcx9c7017; local oscillator circuits 7018xcx9c7025; sending circuit 7026; control circuit 7027; and frequency conversion circuits 7028xcx9c7035.
In the configuration shown in FIG. 40, maximum number of carrier frequencies is eight. In the device shown in FIG. 40, input digital signals are input in the serial-parallel conversion circuit 7001 and are converted to a maximum of eight parallel data under the control of the control circuit 7027 according to the signal inputting speed.
The parallel data are all transmitted at the same speed represented by Fb. Output signals from the serial-parallel conversion circuit 7001 are input into a maximum of eight groups in the eight modulation circuits, and are output as a maximum of eight groups of complex modulated signals.
Complex modulated signals output from the modulation circuits 7002xcx9c7009 are input in the low pass filters 7010xcx9c7017 to limit the bandwidth, and are converted to respective signals of different frequencies by the local oscillators 7018xcx9c7025, are multiplexed by the multiplexer 7036, and are input in the sending circuit to be transmitted from the antennae.
FIG. 41 shows an example of the structure of the conventional digital signal receiver, and shows the receiver side of the device for providing different transmission speeds based on a frequency division multiple access (FDMA) system. The device is comprised by: receive circuit 7101; local oscillators 7102xcx9c7109; low pass filters 7110xcx9c7117; demodulation circuit 7118xcx9c7125; parallel-serial conversion circuit 7126; control circuit 7127; and frequency conversion circuits 7128xcx9c7135.
Signals received by the antennae are frequency converted in the frequency conversion circuits 7128xcx9c7135 to baseband signals, using respective different frequencies produced in the local oscillator circuits 7102xcx9c7109. Convert baseband signals output from the low pass filters 7110xcx9c7117 so as to limit the bandwidth.
Bandwidth-limited signals are input in the demodulation circuits 7118xcx9c7125 to demodulate signals in respective channels. Demodulated signals are input in the parallel-serial conversion circuit 7126, and are converted from a maximum of eight groups of parallel data to serial data and are output under the control of the control section. This structure can produce variable speeds from Fb to eight Fbs.
However, in the digital signal multi/demultiplexer described above, as can be seen by examining FIGS. 20, 21, when the high pass and low pass filters used in the 2-demultiplexing filter banks and 2-multiplexing filter banks are ordinary half-band filters, it becomes difficult to process signals with fidelity because they are affected by interference from aliasing components and distortion effects caused by signal attenuation at the filter joints.
On the other hand, if an ideal filter shown in FIG. 29 is used, it is possible to process the signals without interference and distortion effects. However, impulse response characteristics having such ideal square wave is impossible to realize within a finite time region.
Also, in the conventional variable transmission speed modem described above, input or output signals are frequency-multiplexed or demultiplexed using analogue circuits, so that as many local oscillators and low pass filters are necessary as there are parallel data groups, requiring large-scale circuits and high power consumption.
It is an object of the present invention to provide a digital signal demultiplexer and a digital signal multiplexer, in a convenient configuration and having desirable properties of not being affected by interferences due to aliasing components and signal distortions caused by signal attenuation in the filter joints.
It is another object of the present invention to provide a digital signal transmitter, a receiver and a modem, in a convenient configuration, to enable the modem to operate at variable speed while preventing lowering in frequency utilization.
The present invention relates to a digital signal demultiplexer having means for separating an input signal into two signals by using two types of filters having different pass-bands, and a band-separation filter comprised by serially-connected 2-demultiplexing filter banks having down-sampling means for culling sampling frequencies of divided groups of signals to 1/2; wherein a 2-demultiplexing filter bank includes either one type of filter or other type of filter, so that
one type of filter is a filter A having a lower limit of band-pass frequency of not less than xe2x88x92fs/4 (where fs is the sampling frequency in the 2-demultiplexing filter bank) and an upper limit of band-pass frequency of not more than fs/2; and other type of filter is a filter B having a lower limit of band-pass frequency of not less than 0 and an upper limit of band-pass frequency of not more than 3fs/4; or
one type of filter is a filter C having a lower limit of band-pass frequency of not less than xe2x88x923fs/4 and an upper limit of band-pass frequency of not more than 0; and other type of filter is a filter D having a lower limit of band-pass frequency of not less than xe2x88x92fs/2 and an upper limit of band-pass frequency of not more than fs/4; and
these filters are arranged in series so that a 2-demultiplexing filter bank that follows filter A includes filter A and/or filter B, and a next-stage 2-demultiplexing filter bank that follows filter B includes filter C and/or filter D; and
a next-stage 2-demultiplexing filter bank that follows filter C includes filter A and/or filter B; a next-stage 2-demultiplexing filter bank that follows filter D includes filter C and/or filter D.
Here, xe2x80x9cband-passxe2x80x9d or xe2x80x9cpass-bandxe2x80x9d refers to properties of a filter such as those shown in FIG. 5 to indicate the bandwidths of filtered signals. The upper edge (maximum frequency) of the pass-band is referred to as the xe2x80x9cupper limit of band-passxe2x80x9d and the lower edge (minimum frequency) of the pass-band is referred to as the xe2x80x9clower limit of band-passxe2x80x9d.
The digital signal multiplexer according to the structure described above is different from the conventional digital signal multiplexers because of the feature that the multiplexer is free from interference caused by aliasing components and distortions caused at the filter joints.
Also, the present digital demultiplexer is provided with a fist-stage in the band-separation filter bank comprising not less than one filter selected from the group consisting of filter A, filter B, filter C and filter D.
Accordingly, the present demultiplexer is different from the conventional digital multiplexers because the entire region of sampled bandwidths is free from interferences caused by aliasing components and distortions caused at the filter joints.
The present invention relates to a digital signal multiplexer having band-multiplexing filter means comprised by serially-connected 2-multiplexing filter banks comprised by up-sampling means for doubling sampling frequencies of each input signal, two types of filters for processing output signals from the up-sampling means, and multiplexing means for combining output signals from the two types of filters; wherein a 2-multiplexing filter bank includes either one type of filter or other type of filter, so that
one type of filter is a filter E having a lower limit of band-pass frequency of not less than xe2x88x92fs/4 and an upper limit of band-pass frequency of not more than fs/2; and other type of filter is a filter F having a lower limit of band-pass frequency of not less than 0 and an upper limit of band-pass frequency of not more than 3fs/4; or
one type of filter is a filter G having a lower limit of band-pass frequency of not less than xe2x88x923fs/4 and an upper limit of band-pass frequency of not more than 0; and other type of filter is a filter H having a lower limit of band-pass frequency of not less than xe2x88x92fs/2 and an upper limit of band-pass frequency of not more than fs/4; and
these filters are arranged in series so that output signals from a 2-multiplexing filter bank that includes filter E and/or filter F are processed through up-sampling means to be input into filter E and/or filter G; and
output signals from a 2-multiplexing filter bank that includes filter G and/or filter H are processed through up-sampling means to be input into filter F and/or filter H.
Accordingly, the present multiplexer is different from the conventional digital multiplexers because the signals can be multiplexed free from interferences caused by aliasing components and distortions caused at the filter joints, by arranging the filters having four type of filters having different pass-bands in a serial configuration described above.
Also, the present signal multiplexer is provided with a last-stage in the band-separation filter bank comprising not less than one filter selected from the group consisting of filter E, filter F, filter G and filter H.
The present digital signal multiplexer having above composition is different from the conventional digital multiplexers because the signals can be multiplexed free from interferences caused by aliasing components and distortions caused at the filter joints.
Also, the present digital signal multiplexer exhibits impulse responses A(n), B(n), C(n), D(n), E(n), F(n), G(n) and H(n) of said filters, A, B, C, D, E, F, G and H, respectively, satisfy equations:                                           I            ⁡                          (              n              )                                xc3x97                      ⅇ                                          -                j                            ⁢                              xe2x80x83                            ⁢                              k                4                            ⁢              π              ⁢                              xe2x80x83                            ⁢              n                                      ,                  xe2x80x83                ⁢                  (                                    k              =              1                        ,            3            ,            5            ,            7                    )                                    Equation        ⁢                  xe2x80x83                ⁢                  (          3          )                                                  I          ⁡                      (            n            )                          =                  0          ⁢                      xe2x80x83                    ⁢                      (                          n              ≠                                                N                  2                                ⁢                                  xe2x80x83                                ⁢                and                ⁢                                  xe2x80x83                                ⁢                n                ⁢                                  xe2x80x83                                ⁢                is                ⁢                                  xe2x80x83                                ⁢                an                ⁢                                  xe2x80x83                                ⁢                odd                ⁢                                  xe2x80x83                                ⁢                number                                      )                                              Equation        ⁢                  xe2x80x83                ⁢                  (          4          )                    
where n is an integer and 1xe2x89xa6nxe2x89xa6N, and I(n) represents an impulse response of a source filter having a tap length N.
Because the volume of computation required becomes too high when complex filters are used in the digital signal demultiplexers and multiplexers, in the present devices, frequency conversion is carried out using the source filters in equation (3).
By adopting such an approach, the present devices offer advantages compared with the conventional devices, because the filter coefficients of every filter are real numbers, excepting the center tap, or imaginary numbers only, so that computation can be carried out within about the same volume as conventional real number filters. For example, when the source filter has seven taps, tap coefficients are obtained as shown in Table 2, by calculating the source tap coefficients as shown in Table 1 with Equation (3) in the case of k=1.
The present invention relates to a digital modem having at least a transmitter and a receiver, wherein:
a transmitter is comprised by:
serial-parallel conversion means for converting serial signals to a plurality of parallel slow speed signals; a plurality of modulation means for modulating each signal in parallel-converted signals; and
channel multiplexing means for frequency multiplexing modulated signals and a sending circuit; wherein a channel multiplexing means is comprised by not less than one 2-multiplexing filter bank containing: up-sampling means for doubling sampling frequencies of each signal in two input signals; two types of filters having different pass-bands for filtering output signals-from said up-sampling means, and multiplexing means for multiplexing output signals from the two types of filters; and
when there are more than two 2-multiplexing filter banks, a channel multiplexing means is constructed by serially connecting a plurality of 2-multiplexing filter banks in a multi-stage configuration such that two groups of output signals from two modulation means are successively input into first 2-demultiplexing filter banks in next-stages so that output signals from one 2-demultiplexing filter bank is further input into another 2-multiplexing filter bank in a next-stage; so that, ultimately, output signals from two preceding 2-multiplexing filter banks are input into a last 2-multiplexing filter bank in a final-stage so that signals are input into the sending circuit, and produce output signals from the digital signal transmitter; and
the receiver is comprised by: a receiving circuit; a plurality of channel demultiplexing means for separating frequency multiplexed signals into two groups of signals; a plurality of demodulation circuits for demodulating output signals from the channel demultiplexing means; and parallel-serial conversion means for receiving output signals from each demodulation means; wherein a channel demultiplexing means is comprised by not less than one 2-multiplexing filter bank having: separating means for dividing input signals into two groups of signals by using two types of filters having different pass-bands; and
down-sampling means for culling sampling frequencies of two separated signals to 1/2; and when there are more than two 2-demultiplexing filter banks, 2-demultiplexing filter banks are connected serially so that output signals from the receiving circuit are input in successive 2-demultiplexing filter banks so that
two groups of signals output from one 2-demultiplexing filter bank are input respectively into another 2-demultiplexing filter bank in a next-stage, so that ultimately signals output from a last 2-demultiplexing filter bank in a final-stage are input into respective demodulation means so that output signals from demodulation means are input in the parallel-serial conversion means so that signals output from the parallel-serial conversion means are produced as digital receiver output signals.
The present digital modem according to the structure presented above enables to produce the entire devices using digital circuits so as to obtain a compact device, which is different from the conventional digital modems.
The present digital modem includes at least either a transmitter and a receiver, and the transmitter is comprised by:
serial-parallel conversion means for converting serial signals to a plurality of parallel slow speed signals; a plurality of modulation means for modulating each signal of parallel-converted signals; and channel multiplexing means for frequency multiplexing modulated signals and a sending circuit; wherein
the channel multiplexing means is comprised by not less than one 2-multiplexing filter bank containing: up-sampling means for doubling sampling frequencies of each signal in two groups of input signals; and two types of filters having different pass-bands for filtering output signals from the up-sampling means, and multiplexing means for multiplexing output signals from said two types of filters; and, when there are more than two 2-multiplexing filter banks, the 2-multiplexing filter banks are serially connecting in a multi-stage configuration such that, when there are not less than two 2-demultiplexing filter banks;
output signals from the two modulation means in the sending circuit are frequency multiplexed by using one of the 2-multiplexing filter banks, and the output signals from the 2-multiplexing filter bank and output from other modulation means connected to the serial-parallel conversion means, or output signals from a different 2-multiplexing filter bank having a common sampling frequency are multiplexed in a next 2-multiplexing filter bank in a next-stage,
further, output signals from the 2-multiplexing filter bank and output signals from other modulation means connected to the serial-parallel conversion means, or output signals from 2-multiplexing filter banks having different sampling rates, are successively input into 2-demultiplexing filter banks in succeeding-stages so that output signals from one 2-demultiplexing filter bank is further input into another 2-multiplexing filter bank in a next-stage; so that, output signals from two preceding 2-multiplexing filter banks are input ultimately into a last 2-multiplexing filter bank in a final-stage so that signals are input into the sending circuit, and produce output signals from the digital signal transmitter; and
the receiver is comprised by: a receiving circuit and a plurality of channel demultiplexing means for separating frequency multiplexed signals; a plurality of demodulation means for demodulating received signals; and parallel-serial conversion means for receiving output signals from the demodulation circuits, and the channel demultiplexing means is comprised by not less than one 2-demultiplexing filter bank having: a circuit for separating input signals into two groups of signals by using two types of filters having different pass-bands; and down-sampling means for culling sampling frequencies of two separated signals to 1/2; and,
when there are more than two 2-demultiplexing filter banks, the 2-multiplexing filter banks are connected in series such that output signals from the receiving circuit are demultiplexed in the 2-demultiplexing filter bank in succeeding stages, and one output signals from the 2-demultiplexing filter bank or the demodulation circuit while other output signals are input in another 2-demultiplexing filter bank in a next-stage; so that output signals from a last-stage 2-demultiplexing filter bank are ultimately input into the parallel-serial conversion means so as to output signals from the conversion means as digital signal receiver signals.
In the present invention, the digital modem according to the structure presented above enables to produce variable transmission rates according to input transmission rates, by selecting suitable demodulation circuits.
The present invention relates to a digital modem having at least one of either a transmitter or a receiver, and
the transmitter is comprised by: modulation means for time-division processing of input signals; channel multiplexing means for frequency multiplexing signals; and a sending circuit; and the channel multiplexing means is comprised by up-sampling means to double sampling frequencies of each signal in two groups of input signals; and
the channel multiplexing means is comprised by not less than one 2-multiplexing filter bank including two kinds of filters having two different pass-bands for filtering output signals from the up-sampling means and multiplexing means for multiplexing two groups of signals output from the two types of filters, and when there are more than two 2-multiplexing filter banks, the 2-multiplexing filter banks are connected in series so that two output groups of time-division processed signals are input into one 2-multiplexing filter bank, and
output signals from the one 2-multiplexing filter bank is further input into another 2-multiplexing filter bank in a next-stage and one group of modulated signals by time-division processing is input directly into a next-stage 2-multiplexing filter bank, so that output signals are ultimately input into a last 2-multiplexing filter bank in a final-stage so that signals are input into the sending circuit; and
the receiver is comprised by: a receiving circuit and a plurality of channel demultiplexing means for separating frequency multiplexed signals; a plurality of demodulation means for time-division demodulating output signals from the channel demultiplexing means; and the channel demultiplexing means is comprised by not less than one 2-multiplexing filter bank having: a circuit for separating input signals into two groups of signals by using two types of filters having different pass-bands and down-sampling means for culling sampling frequencies of two separated signals to 1/2; and, when there are more than two 2-demultiplexing filter banks, the 2-demultiplexing filter banks are connected in series such that output signals from the receiving circuit are input in the 2-demultiplexing filter bank, and one group of signals output from the 2-demultiplexing filter bank are input in the time-division processing demodulation means, and other group of signals are input in another 2-demultiplexing filter bank in a next-stage; and, one group of signals in the two groups of signal output from the 2-demultiplexing filter bank are input into another 2-demultiplexing filter bank in a next-stage, and other group of signals are input another demodulation means in a time-division processing mode, so that output signals are ultimately produced from a final-stage time-division processed demodulation means.
In the present invention, digital modem according to the structure presented above enables to produce variable transmission rates according to the input transmission speed, by selecting suitable demodulation circuits.
Also, the present invention relates to the digital modem described above where one type of filter in the 2-multiplexing filter bank of the channel multiplexing means is a filter A having a lower limit of band-pass frequency of not less than xe2x88x92fs/4 (where fs is the sampling frequency in the 2-demultiplexing filter.bank) and an upper limit of band-pass frequency of not more than fs/2; and
other type of filter is a filter B having a lower limit of band-pass frequency of not less than 0 and an upper limit of band-pass frequency of not more than 3fs/4; or
one type of filter is a filter C having a lower limit of band-pass frequency of not less than xe2x88x923fs/4 and an upper limit of band-pass frequency of not more than 0; and
other type of filter is a filter D having a lower limit of band-pass frequency of not less than xe2x88x92fs/2 and an upper limit of band-pass frequency of not more than fs/4; so that
these filters are arranged in series so that output signals processed through a 2-multiplexing filter bank containing one or both of filters A, B are input into filter A and/or filter C through the up-sampling means; and output signals processed through a 2-multiplexing filter bank containing one or both of filters C, D are input into filter B and/or filter D through the up-sampling means are processed by yet another filter bank that includes filter B and/or filter D.
Also, the present invention relates to the digital modem described above where 2-demultiplexing filter bank of the channel demultiplexing means is comprised by either of the two filter configurations so that:
one type of filter in the 2-demultiplexing filter bank of the channel demultiplexing means is a filter A having a lower limit of band-pass frequency of not less than xe2x88x92fs/4 (where fs is the sampling frequency in the 2-demultiplexing filter bank) and an upper limit of band-pass frequency of not more than fs/2; and other type of filter is a filter B having a lower limit of band-pass frequency of not less than 0 and an upper limit of band-pass frequency of not more than 3fs/4; or
one type of filter is a filter C having a lower limit of band-pass frequency of not less than xe2x88x923fs/4 and an upper limit of band-pass frequency of not more than 0; and other type of filter is a filter D having a lower limit of band-pass frequency of not less than xe2x88x92fs/2 and an upper limit of band-pass frequency of not more than fs/4; and
a 2-demultiplexing filter bank in the next-stage for processing the signals output from the filter A contains filter A or /and B; a 2-demultiplexing filter bank in the next-stage for processing the signals output from the filter B contains filter C or /and D; a 2-demultiplexing filter bank in the next-stage for processing the signals output from the filter C contains filter A or /and B; and a 2-demultiplexing filter bank in the next-stage for processing the signals output from the filter D contains filter C or/and D.
The digital modem having the above construction enables to frequency multiplex signals in each channel without suffering from interference caused by aliasing components and detrimental effects caused by amplitude distortions.
Also, the present invention relates to a digital modem for processing input signals comprised by different slow speed signals.
The present digital modem is different from the conventional digital modem because it is provided with complex demodulation circuits having different modulation speeds. Accordingly, compared with the modem based on single speed demodulation circuit, the scale of the demodulation circuit can be reduced in the present digital modem.
The present invention relates to the digital signal transmitter in which a plurality of slow speed signals have different speeds.
According to the present digital modem, the number of demodulation means for obtaining a: uniform transmission speed can be minimized.
Also, the present invention relates to the digital modem in which at least parts of the demodulation means, modulation means, multiplexing means and demultiplexing means are operated on a time-division mode.
The digital modem of the construction described above provides different sampling speeds for the modulations means, 2-multiplexing filter banks, 2-demultiplexing filter banks and demodulation means, and utilizing the fact that the slower the sampling speed the higher the number of signal groups, the scale of the device is reduced by operating one group of higher speed processing means in a time-division mode.
Also, the present invention relates to the digital modem described above is provided with means for varying the operating speed of digital transmission and reception signals.
The digital modem having the construction described above is different from the conventional digital modems because of its capability for processing signals of different operating speeds.